It is unlikely that the U.S. semiconductor industry can reverse the loss of its manufacturing base. The industry is driven by the intertwined forces of technology and economics as embodied in Mooreâ€™s Law, the phenomenon of doubling the processing power possible at a given cost every 18 months to two years. Nanoscale technology is bringing that phenomenon to new levels of performance using nanoscale chips that require fabrication plants (â€śfabsâ€ť) costing $5 billion or more.
These new â€śmega-fabsâ€ť cater to high-volume consumer markets, which can sustain the high-volume manufacturing needed for profitable operations. Low-volume customers like the U.S. military, government, and research centers simply canâ€™t be served profitably. The secure advanced chips required by DOD, NSA, DARPA, Air Force, Navy, Army, and DOE typically number only in the hundreds, not the hundreds of thousands or millions. This makes the cost per chip extraordinarily high and severely limits the governmentâ€™s procurement options.
The new offshore factories are set up to run tens of thousands of wafer starts per month. The economies of scale simply donâ€™t work for small-lot production. The cost of producing 200mm semiconductors becomes prohibitively expensive below the 90nm node. The cost of state-of-the-art 300mm semiconductors is exponentially higher than 200mm products. As a result, there are no 300mm facilities available in the U.S. today that could be converted to small-lot production. A facility of this nature would need to be built from the ground up. Even high-volume U.S. manufacturers have begun to disappear and will continue to do so as we move to next-generation 450mm wafer semiconductors.
Overcoming this cost barrier requires research and innovation in tools and processes. New solutions like mask-less lithography, for example, can bring down cost and create more flexibility. With proper planning and funding, a secure, flexible, state-of-the-art, low-volume foundry can be brought to reality.